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دسته بندی:
داده های بزرگ - big data
سال انتشار:
2016
عنوان انگلیسی مقاله:
Bridging the I/O Performance Gap for Big Data Workloads: A New NVDIMM-based Approach
ترجمه فارسی عنوان مقاله:
پل زدن به شکاف عملکرد I / O برای ظرفیت کارهای داده های بزرگ: رویکرد مبتنی بر NVDIMM جدید
منبع:
IEEE - Microarchitecture (MICRO), 2016 49th Annual IEEE/ACM International Symposium on
نویسنده:
Renhai Chen, Zili Shao, and Tao Li
چکیده انگلیسی:
The long I/O latency posts significant challenges for
many data-intensive applications, such as the emerging big data
workloads. Recently, the NVDIMM (Non-Volatile Dual In-line
Memory Module) technologies provide a promising solution to
this problem. By employing non-volatile NAND flash memory
as storage media and connecting them via DIMM (Dual Inline Memory Module) slots, the NVDIMM devices are exposed
to memory bus so the access latencies due to going through
I/O controllers can be significantly mitigated. However, placing
NVDIMM on the memory bus introduces new challenges. For
instance, by mixing I/O and memory traffic, NVDIMM can
cause severe performance degradation on memory-intensive applications. Besides, there exists a speed mismatch between fast
memory access and slow flash read/write operations. Moreover,
garbage collection (GC) in NAND flash may cause up to several
millisecond latency.
This paper presents novel, enabling mechanisms that allow
NVDIMM to more effectively bridge the I/O performance gap
for big data workloads. To address the workload heterogeneity
challenge, we develop a scheduling scheme in memory controller to minimize the interference between the native and
the I/O-derived memory traffic by exploiting both data access
criticality and resource utilization. For NVDIMM controller,
several mechanisms are designed to better orchestrate traffic
between the memory controller and NAND flash to alleviate the
speed discrepancy issue. To mitigate the lengthy GC period, we
propose a proactive GC scheme for the NVDIMM controller and
flash controller to intelligently synchronize and transfer data
involving in forthcoming GC operations. We present detailed
evaluation and analysis to quantify how well our techniques fit
with the NVDIMM design. Our experimental results show that
overall the proposed techniques yield 10%∼35% performance
improvements over the state-of-the-art baseline schemes.
Keywords: Nonvolatile memory | Random access memory | Throughput | Performance evaluation | Interference
قیمت: رایگان
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